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Abstract
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Article Information:
A Novel Nanometric Fault Tolerant Reversible Subtractor Circuit
Mozhgan Shiri, Majid Haghparast and Vahid Shahbazi
Corresponding Author: Mozhgan Shiri
Submitted: December 30, 2011
Accepted: March 10, 2012
Published: November 15, 2012 |
Abstract:
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Reversibility plays an important role when energy efficient computations are considered. Reversible
logic circuits have received significant attention in quantum computing, low power CMOS design, optical
information processing and nanotechnology in the recent years. This study proposes a new fault tolerant
reversible half-subtractor and a new fault tolerant reversible full-subtractor circuit with nanometric scales. Also
in this paper we demonstrate how the well-known and important, PERES gate and TR gate can be synthesized
from parity preserving reversible gates. All the designs have nanometric scales.
Key words: Fault tolerant , nanometric circuits, nanotechnology, quantum computing, reversible logic, subtractor,
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Cite this Reference:
Mozhgan Shiri, Majid Haghparast and Vahid Shahbazi, . A Novel Nanometric Fault Tolerant Reversible Subtractor Circuit. Research Journal of Applied Sciences, Engineering and Technology, (22): 4566-4571.
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ISSN (Online): 2040-7467
ISSN (Print): 2040-7459 |
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