Abstract

This study presents an architectural approach to the design of Low Area and high speed linear phase Finite Impulse Response (FIR) digital filter. FIR digital filters are used in DSP by the virtue of its, linear phase, fewer finite precision error, stability and efficient implementation. In the proposed architecture, we are introduced five parallel linear phase fir filter to obtain the high speed and low Area than four parallel fir filters. So the proposed architectures offer Low Area and high speed compared to the best existing linear phase FIR filter implementations in the literature and the proposed architectures have been implemented and tested on Spartan-3 xc3s200-5pq208 Field-Programmable Gate Array (FPGA) and synthesized.

Keywords:

Fast FIR Algorithms (FFAs) , high speed filter, linear-phase FIR filter , parallel FIR filter,

References

1. Acha, J.I., 1989. Computational structures for fast implementation of L-pathand L-block digital filters. IEEE T. Circuits Syst., 36(6): 805-812.
   CrossRef    
2. Cheng, C. and K.K. Parhi, 2004. Hardware efficient fast parallel FIR filter structures based on iterated short convolution. IEEE T. Circuits-I, 51(8): 1492-1500.
   CrossRef    
3. Cheng, C. and K.K. Parhi, 2005. Further complexity reduction of parallel FIR filters. Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS, 2005), 2: 1835-1838.
   CrossRef    
4. Cheng, C. and K.K. Parhi, 2007. Low-cost parallel FIR structures with 2-stage parallelism. IEEE T. Circuits-I, 54(2): 280-290.
   CrossRef    
5. Chung, J.G. and K.K. Parhi, 2002. Frequency-spectrum-based low-area low power parallel FIR filter design. EURASIP J. Appl. Si. Pr., 2002(9): 444-453.
   
6. Lin, I.S. and S.K. Mitra, 1996. Overlapped block digital filtering. IEEE T. Circuits-II, 43(8): 586-596.
   
7. Mou, Z.J. and P. Duhamel, 1991. Short-length FIR filters and their use in fast non recursive filtering. IEEE T. Signal Proces., 39(6): 1322-1332.
   
8. Parhi, K.K., 1999. VLSI Digital Signal Processing systems: Design and Implementation. Wiley, New York.
   
9. Parker, D.A. and K.K. Parhi, 1997. Low-area/power parallel FIR digital filter implementations. J. VLSI Sig. Proc. Syst., 17(1): 75-92.
   CrossRef    
10. Tsao, Y.C. and K. Choi, 2010. Area-efficient parallel FIR digital filter structures for symmetric convolutions based on fast FIR algorithm. IEEE T. VLSI Syst., 20(2): 366-371.
    CrossRef    
11. Yu, C. and C. Ken, 2012. Area-efficient VLSI implementation for parallel linear-phase fir digital filters of odd length based on fast fir algorithm. IEEE T. Circuits-II, 59(6).
    

Competing interests

The authors have no competing interests.

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The authors have no competing interests.