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Abstract
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Article Information:
Design of a Novel Nanometric Parity Preserving Reversible Diminished-One Modulo 2n+1 Adder Using Circular Carry Selection
Nayereh Hosseini Nia and Majid Haghparast
Corresponding Author: Majid Haghparast
Submitted: 2011 August, 23
Accepted: 2011 September, 25
Published: 2012 January, 01 |
Abstract:
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In recent years, reversible logic is of prominent factor in energy efficient computation. Reversible
logic circuits play important role in nanotechnology-based systems and have applications in quantum
computing, low power CMOS designs, DNA computing, bioinformatics and optical information processing.
This paper proposes two efficient hardware architecture of reversible circular carry selection diminished-one
modulo 24+1 adders which one of them is parity preserving. The proposed reversible circular carry selection
diminished-one modulo 24+1 adder can be generalized for reversible circular carry selection diminished-one
modulo 2n+1 adder. The parity preserving reversible logic circuit of the m×r partitioned CCS modular adder
is also proposed. One of the important interests for a high-performance residue number system is the
diminished-one modulo 2n+1 addition. It is a prominent arithmetic operation for RNS. The circuits are evaluated
in terms of number of reversible gates, number of garbage outputs, number of constant inputs, quantum cost
and hardware complexity. All the scales are in the nanometric area.
Key words: Reversible diminished modulo 24+1 adder, reversible diminished modulo 2n+1 adder, reversible logic gate, residue number system, , ,
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Cite this Reference:
Nayereh Hosseini Nia and Majid Haghparast, . Design of a Novel Nanometric Parity Preserving Reversible Diminished-One Modulo 2n+1 Adder Using Circular Carry Selection. Research Journal of Applied Sciences, Engineering and Technology, (01): 20-26.
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ISSN (Online): 2040-7467
ISSN (Print): 2040-7459 |
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