Abstract

In order to improve the accessing capacity for CPU, we design a new storage system based on serial communication. The system utilizes some pieces of DDR SDRAM as storage space. A new serial communication protocol and data frame format is introduced in this study. With the serial communication protocol, the CPU will access the data storage with only two unidirectional serial buses. The storage system has the advantages of easy expansion of capacity, simple structure and flexible application. The whole design is realized in VHDL and verified on Xilinx FPGA development platform EDK.

Keywords:

Data storage, DDR SDRAM, EDK serial communication,

References

Competing interests

The authors have no competing interests.

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Copyright

The authors have no competing interests.