Research Article | OPEN ACCESS
The Ramped-step Voltage in Adiabatic Logic Circuits: Analysis of Parameters to Further Reduce Power Dissipation
1Nazrul Anuar Nayan, 2Yasuhiro Takahashi and 2Toshikazu Sekine
1Faculty of Engineering and Built Environment, Universiti Kebangsaan Malaysia, Bangi,
Selangor, Malaysia
2Faculty of Engineering, Gifu University, Gifu, Japan
Research Journal of Applied Sciences, Engineering and Technology 2013 1:114-117
Received: April 07, 2012 | Accepted: May 23, 2012 | Published: January 01, 2013
Abstract
Ramped-step voltage supplies are widely used in adiabatic switching. However, the set of analytical parameters available for understanding these voltage supplies is still limited. Our objective is to identify the parameters that have an effect on lowering power dissipation. Our results show that power dissipation can be significantly reduced using adiabatic logic, by increasing the charging and discharging times and by reducing the peak current flow through the transistors. The phenomenon of energy recovery is also demonstrated. A maximum of 40% reduction in the total power dissipation is shown from this analysis.
Keywords:
Adiabatic logic, discharging, energy recovery, low-power,
Competing interests
The authors have no competing interests.
Open Access Policy
This article is distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made.
Copyright
The authors have no competing interests.
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ISSN (Online): 2040-7467
ISSN (Print): 2040-7459 |
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