Abstract

In this study, we proposed high speed adder and low power and secure for module set {2ⁿ-1, 2ⁿ, 2ⁿ+1} where we have provided to achieve maximum speed circuits for addition and subtraction computational method called the One-hot has been used where the delayed implementation using this method is that the size of a transistor in comparison with other previous implementations has improved dramatically. Another benefit of One-hot having a simple structure and regular implementation of the minimum power dissipation is the use of the Residue Logarithmic Number System arithmetic circuit with a balance can be very useful.

Keywords:

Logarithmic number system, one-hot residue logarithmic number system, one-hot residue number system, one-hot system, residue number system,

References

Competing interests

The authors have no competing interests.

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The authors have no competing interests.